Abstract—This paper studies the phonon-limited electron mobility of the inversion layer at room temperature for ultra-thin body (001) Ge and (111) Ge layers in single-gate (SG) and double-gate (DG) germanium-on-insulator (GOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) aiming at future radio-frequency applications. Simulations are based on one-dimensional self-consistent calculations and relaxation time approximations. Assuming a 7.2-nm-thick GOI layer on (001) Ge surface, it has been demonstrated that intravalley phonon scattering in the DG GOI MOSFET inversion layer is strongly suppressed within a range of medium and high effective field values; DG GOI MOSFETs have higher phonon-limited electron mobility than SG GOI MOSFETs. The suppression of intra-valley-phonon scattering in a 7.2-nm-thick DG GOI MOSFET primarily stems from the reduction in the form factor at medium and high effective field values. However, it is shown that the use of the (001) Ge surface offers little merit in DG GOI MOSFETs because the mobility value is not large. It is demonstrated that the superior electron mobility on the (111) Ge surface of SG GOI MOSFETs confirms the significant merit of this structure with regard to applications because acoustic-phonon scattering events are significantly reduced in the non-degenerate L valley. Primary mechanism responsible for this fact is that some inter-subband form factors of electrons sharing the lowest subband of the non-degenerate L valley decrease at low effective field values, while the intra-subband form factor of electrons sharing the lowest subband of the non-degenerate L valley remains large. The expected phonon-limited electron mobility of SG GOI MOSFETs having a 4-nm-thick GOI layer, for example, with (111) Ge surface, is about 2300 cm2/V/s at the effective field of 0.5 MV/cm; this is about 400% of that of the equivalent SG GOI MOSFET with (001) Ge surface.